- 您现在的位置：买卖IC网 > Sheet目录1201 > CDB5460AU (Cirrus Logic Inc)EVALUATION BOARD FOR CS5460A
CS5460A
RS
DL0
DL1
EOD
SI[1:0]
Res
EWA
Gi
PC[6:0]
DS487F5
Start a chip reset cycle when set 1. The reset cycle lasts for less than 10 XIN cycles. The bit is
automatically returned to 0 by the reset cycle.
When EOD = 1, EDIR becomes a user defined pin. DL0 sets the value of the EDIR pin.
Default = '0'
When EOD = 1, EOUT becomes a user defined pin. DL1 sets the value of the EOUT pin.
Default = '0'
Allows the EOUT and EDIR pins to be controlled by the DL0 and DL1 bits. EOUT and EDIR can
also be accessed using the Status Register.
0 = Normal operation of the EOUT and EDIR pins. (default)
1 = DL0 and DL1 bits control the EOUT and EDIR pins.
Soft interrupt configuration. Select the desired pin behavior for indication of an interrupt.
00 = active low level (default)
01 = active high level
10 = falling edge (INT is normally high)
11 = rising edge (INT is normally low)
Reserved. These bits must be set to zero.
Allows the output pins of EOUT and EDIR of multiple chips to be connected in a wire-AND, us-
ing an external pull-up device.
0 = normal outputs (default)
1 = only the pull-down device of the EOUT and EDIR pins are active
Sets the gain of the current PGA
0 = gain is 10 (default)
1 = gain is 50
Phase compensation. A 2’s complement number used to set the delay in the voltage channel.
When MCLK = 4.096 MHz and K = 1, the phase adjustment range is about -2.8 to +2.8 degrees
and each step is about 0.04 degrees (this assumes that the power line frequency is 60 Hz). If
(MCLK / K) is not 4.096 MHz, the values for the range and step size should be scaled by the
factor 4.096 MHz / (MCLK / K).
Default setting is 0000000 = 0.0215 degrees phase delay (when MCLK = 4.096 MHz).
45
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
CDB5461AU
BOARD EVAL & SOFTWARE CS5461A
CDB5466U
BOARD EVAL & SOFTWARE CS5466 ADC
CDB5467U
BOARD EVAL FOR CS5467 ADC
CDB5560-2
DEV BOARD FOR CS5560 W/SE INPUT
CDB5571-2
DEV BOARD FOR CS5571 W/SE INPUT
CDB8422
BOARD EVAL FOR CS8422 RCVR
CDB8952T
BOARD EVAL FOR CS8952
CDCE906-706PERFEVM
EVAL MOD PERFORMANCE CDCE906/706
相关代理商/技术参数
CDB5460AU-Z
制造商:Cirrus Logic 功能描述:PB-FREEEVAL BOARD FOR CS5460 - Bulk
CDB5461
制造商:Cirrus Logic 功能描述:EVAL BD FOR CS5461 - Bulk
CDB5461A
功能描述:EVAL BOARD FOR CS5461 RoHS:否 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 类型:MCU 适用于相关产品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、缆线、软件、数据表和用户手册 其它名称:520-1035
CDB5461AU
功能描述:数据转换 IC 开发工具 Eval Bd Sngl-Phase Pow/Energy
RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V
CDB5461AU-Z
制造商:Cirrus Logic 功能描述:PB-FREEEVAL BOARD FOR CS5461 WITH USB - Bulk
CDB5462
制造商:Cirrus Logic 功能描述:EVAL BOARD FOR CS5462 - Bulk
CDB5463U
功能描述:数据转换 IC 开发工具 Eval Bd Sngl-Phase Pow/Energy
RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V
CDB5463U-Z
功能描述:EVAL BOARD USB FOR CS5463 RoHS:是 类别:编程器，开发系统 >> 评估板 - 模数转换器 (ADC) 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- ADC 的数量:1 位数:12 采样率（每秒）:94.4k 数据接口:USB 输入范围:±VREF/2 在以下条件下的电源（标准）:- 工作温度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，软件